MaximumPC 2004 11

5800 MA XIMMA XIMUUMMPPCC XXXXXXX 2004NOVEMBER 2004

in a space not much bigger than a

thumbnail? A special “logic team” is

assigned to develop this schematic

while ensuring that the resulting CPU

design performs all the functions it’s

supposed to, or at least comes as

close as possible with a minimum of

compromises. The logic team takes

the block diagrams of logic—literally,

the pathways along which electricity

and data will move—necessary for the

CPU to do its thing and assembles it,

indicating that a bus should go here,

an arithmetic logic unit (ALU) ought to

go there, the memory should be over

here, etc. The block diagram is essen-

tially just an organizational chart that

shows the circulatory system of the

proposed CPU.

While part of the logic team is put-

ting together these CPU building-block

schematics, another part of the team

is charged with validating these proto-

type arrangements.

They do this by using the mother

of all simulation apps—a register

transfer language (or RTL) simulator.

The RTL simulator is to aspiring CPUs

what a flight simulator is to aspiring

pilots. It duplicates everything that

can and should happen in a CPU’s

operations, including crashes, with-

out the heartbreak and expense that

can come from testing completed

hardware. By feeding the prototype

processor design along with some test

code into the RTL simulator, the logic

team assures that nothing in the initial

design conflicts with another operation

and that everything actually works the

way it was meant to work.

Step 4: Implement

and Validate the CPU

Supermodel

Logic tools like the RTL simulator are

of such high quality and reliability

these days that mistakes are quite

rare, but even so, the simulations

don’t stop here. Now it’s the physi-

cal model team’s turn. Their job is to

determine whether all of this virtually

prototyped logic, which is still basi-

cally conceptual, will work once it

leaves the design phase and becomes

actual hardware.

To accomplish this phase of devel-

opment, the team begins implemen-

tation of the circuits—say, a memory

area that will store custom cache or

some control logic that tells the CPU

how it should perform a specific func-

tion. The implementation is then run

through a synthesizer that maps the

circuitry onto a virtual silicon layout.

In this format, the CPU design looks,

smells, and tastes just as it will when

it’s actually created—except that there

is no look, smell, or taste because it’s

all still virtual.

A successful implementation still

isn’t enough at this stage. The physi-

cal team must also prove that the

circuit will run reliably at the speci-

fied clock speed when it’s actually

built. Not all designs do—sometimes

they need to be nudged a bit. That’s

not surprising when you consider the

miniscule size at which everything is

supposed to work.

After this process is completed,

any changes suggested by the physi-

cal team—for example, say, a logic

design works but can’t be physically

implemented because of crosstalk

between circuits—go back to the

logic team for reworking. When

that’s done, the physical team works

its magic again and the situation

is repeated until everything jibes.

This neat little quality-control loop is

often referred to as an “iteration.” For

instance, “we needed to iterate that

circuit several times,” rather than,

“we really messed that one up. Let’s

try it again.”

At the end of this logical/physi-

cal tug of war, the design is closed

and re-submitted to the RTL simula-

tor once more, just to be sure. If it

passes, the computer model is finally

ready to go to silicon.

Step 5: The Die is Cast

Getting the CPU model to “hard

copy,” as it were, is not much easier

than developing the model in the first

place. This process involves photo-

etching the components—both the

transistors and their connections—

onto silicon. The layouts developed in

the simulations need to be transferred

to photo masks (similar to photo

negatives), which sounds simple

enough, until you realize that each

transistor may require several masks.

There’s a mask layer for every layer of

metal and another mask that’s used

to define the connections between

the components. And we’re not talk-

ing Photoshop here. The masks are

“drawn” onto the silicon itself using

an electron beam. (As an example of

After they are cut from the cylinder, silicon discs are spun at high

rotations to confirm surface uniformity. The irresistible urge to

“scratch” the disc like a DJ at this stage is one reason why tours are

generally not conducted in processor factories.

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