MaximumPC 2007 06

(Dariusz) #1

I


n what Intel is calling its most exhaustive
CPU makeover since the Pentium Pro, the
company’s next next-generation proces-
sor will reportedly feature eight cores, an
integrated memory controller, and updated
Hyper-Threading support.
Code-named Nehalem, the CPU is
expected next year and will be the follow-up
punch in Intel’s one-two attack on AMD. Intel
formally calls its strategy “tick-tock.” The tick
is a minor upgrade to an existing product
line, while the tock is a major redesign of its
CPU core.
Like Intel’s upcoming Penryn CPU (the
tick, as it were), Nehalem will be based on a
45nm process technology, but it will feature
a number of critical differences. The most
anticipated of which is an integrated memory
controller. Intel has been criticized for years

for not following Transmeta and AMD in this
respect, but with Nehalem, the memory con-
troller will at last move from the chipset to the
CPU and feature high-speed, point-to-point
interconnects between the individual cores.
Intel also broke its silence about its
graphics intentions. Although rumors have
swirled for months that Intel would challenge
Nvidia and AMD in discrete graphics, Intel
announced that it will actually integrate a
GPU core under the heat spreader of some
Nehalem chips. The GPU won’t compete
with the high-end parts sitting in PCI-E slots;
however, it will be suitable for “mainstream”
graphics. On paper, Nehalem’s design
seems similar to plans AMD announced
some time ago, but Intel claims that it’s
been on this path for a while. Intel has also
long said it would do an integrated memory

controller only when the time was right, and
indeed, Intel’s current benchmarks haven’t
been hurt by the absence of the part.
Regarding Intel’s update to Conroe,
code-named Penryn, the CPU is on schedule
for a launch early next year. Penryn will be
similar to Conroe, with the chip being offered
in a native dual-core design and a two-dual-
cores-under-one-heat-spreader confi guration
for quad-core support. Penryn will use Intel’s
new 45nm process and include a host of new
features to keep it competitive with AMD’s
upcoming Barcelona CPU. Penryn will boast
new SSE4 instructions to speed up encod-
ing and digital imaging, 6MB of L2 cache (up
from 4MB in Conroe), a fast division engine
for math, and a “super shuffl e” engine that
will greatly increase encoding speed. Penryn
will also be the fi rst CPU to feature Intel’s
dynamic acceleration technology (DAT). DAT
works by auto-overclocking one of the CPU
cores if the other is not being used—a com-
mon situation in many single-threaded games
and applications.
The fi rst desktop Penryn CPU is expect-
ed to ship at greater than 3GHz on a new,
faster 1,333MHz front-side bus. Xeon-based
Penryn chips, meanwhile, will move to a
1,600MHz front-side bus. Intel says it’s still
on schedule for the fi rst quarter of next year,
but most experts believe Intel is likely to
move up the launch, so it lands squarely on
the head of AMD’s upcoming CPUs like an
anvil. Both Intel and AMD have boasted that
their next chips will be 40 percent faster than
the fastest Intel chips out today.

Intel makes waves with promises of


an eight-core processor, an integrat-


ed memory controller, and socket-


bound graphics by next year


08 MAXIMUMPC JUNE 2007


Ready for


Octo-Core


Computing?


INTEL’S CURRENT AND NEXT-GEN CPUs COMPARED


CODE-NAME Conroe Penryn
PRODUCT NAME Core 2 Duo, Core 2 Extreme Likely Core 2 and
Core 2 Extreme
MICROARCHITECTURE Core Core
PROCESS TECHNOLOGY 65nm 45nm
TOP CLOCK SPEED 2.93GHz 3GHz+ at launch
L2 CACHE 4MB 6MB
INSTRUCTIONS SSE, SSE2, SSE3, SSE3+ SSE, SSE2, SSE3, SSE3+, SSE
TRANSISTOR COUNT 291 million in dual confi gura-
tion, 582 million in quad
confi guration

410 million in dual confi gura-
tion, 820 million in quad con-
fi guration
DIE SIZE 143mm2 (x^2 for quad) 107mm2 (x^2 for quad)

Penryn is expected to work in most existing Core 2 boards that offer
1,333MHz front-side bus support.

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