MaximumPC 2008 12

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chip for server use as well, the new instructions are mainly to help speed up supercomputing and

server-oriented workloads.

The main takeaway is that while some of the changes are radical, Intel is being pragmatic with

its chip design—you won’t have to go out and buy new software to experience the CPU’s perfor-

mance potential.

MAKING BETTER CONNECTIONS

With a Hyper-Threaded quad core, even enthusiasts are unlikely to see the need for a multi-processor machine;

nevertheless, one of the new features in Core i7 directly addresses a weakness in Intel’s current lineup when it

comes to multi-CPU machines. As you know, Intel currently uses a front-side-bus technology to tie its multi-

processor machines together. As you might imagine, problems arise when a single front-side bus is sharing two

quad-core CPUs. With so many cores churning so much data, the front-side bus can become gridlocked. Intel

“fi xed” this issue by building chipsets with two front-side buses. But what happens when you have a machine

with four or eight CPUs? Since Intel couldn’t keep adding front-side buses, it took another page from AMD’s

playbook by building in direct point-to-point connections over what it calls a Quick Path Interconnect. Server

versions of Core i7 feature two QPI connections (desktop versions get just one), which can each talk at about

25GB/s, or double what a 1,600MHz front-side bus can achieve. AMD fans, of course, will point out that the fast-

est iteration of AMD’s chip-to-chip conduit, dubbed HyperTransport 3.1, is twice as fast as the current QPI.

QPI combined with the on-die memory controller will also make an Intel server or workstation a NUMA,

or non-uniform memory access, design. Since each CPU has a direct link to its own individual memory

DIMM, what happens if CPU 1 needs to access something that’s stored in the RAM being controlled by CPU

2? In this case, it must use the QPI link to access the second CPU’s memory controller to the RAM to get

the data. This will slow things down a bit, but Intel says its tests indicate that even given this scenario, the

memory access is still faster than what is possible with the current front-side-bus multiprocessor design.

THE POWER WITHIN

It’s a known fact that overclocking can decrease the life of your CPU; thus, Intel has always discouraged

end-users from overclocking its CPUs. With Core i7, Intel reverses its stance and actually overclocks the

CPU for you! Of course, Intel would not describe its Turbo mode as overclocking, and, technically, it isn’t.

While pushing your 2.66GHz Core 2 Quad to 3.2GHz would likely strain its thermal and voltage specs, the

new Core i7 CPUs feature an internal power control unit that closely monitors the power and thermals of

the individual cores.

This wouldn’t help by itself, though. Intel designed the Core i7 to be very aggressive in power manage-

ment. With the previous Core 2, power to the CPU could be lowered only so far before the chip would

Core

Qpi Qpi

Core Core Core

Memory controller

Shared L3 cache

Queue

Execution

units

Out of order

scheduling

and

retirement

Instruction

decode and

microcode

L1 data cache

Memory

ordering and

execution

L2 cache and

interrupt

servicing

Paging

Branch

prediction

Instruction

fetch and L

cache

Technology Watch List

The 45nm-based Core i7 will
pack all four cores on a single
die. The cores will communi-
cate via a high-speed crossbar
switch. An integrated memory
controller and Quick Path
Interconnect links to other
CPUs also make the Core i
very AMD-like.