1.14. CONDITIONAL JUMPS
Listing 1.115: f_unsigned()f_unsigned:
stp x29, x30, [sp, -48]!
; W0=a, W1=b
cmp w0, w1
add x29, sp, 0
str x19, [sp,16]
mov w19, w0
bhi .L25 ; Branch if HIgher (a>b)
cmp w19, w1
beq .L26 ; Branch if Equal (a==b)
.L23:
bcc .L27 ; Branch if Carry Clear (if less than) (a<b)
; function epilogue, impossible to be here
ldr x19, [sp,16]
ldp x29, x30, [sp], 48
ret
.L27:
ldr x19, [sp,16]
adrp x0, .LC11 ; "a<b"
ldp x29, x30, [sp], 48
add x0, x0, :lo12:.LC11
b puts
.L25:
adrp x0, .LC9 ; "a>b"
str x1, [x29,40]
add x0, x0, :lo12:.LC9
bl puts
ldr x1, [x29,40]
cmp w19, w1
bne .L23 ; Branch if Not Equal
.L26:
ldr x19, [sp,16]
adrp x0, .LC10 ; "a==b"
ldp x29, x30, [sp], 48
add x0, x0, :lo12:.LC10
b puts
The comments were added by the author of this book. What is striking is that the compiler is not aware
that some conditions are not possible at all, so there is dead code at some places, which can never be
executed.
Exercise
Try to optimize these functions manually for size, removing redundant instructions, without adding new
ones.
MIPS
One distinctive MIPS feature is the absence of flags. Apparently, it was done to simplify the analysis of
data dependencies.
ThereareinstructionssimilartoSETccinx86:SLT(“SetonLessThan”: signedversion)andSLTU(unsigned
version). These instructions sets destination register value to 1 if the condition is true or to 0 if otherwise.
The destination register is then checked usingBEQ(“Branch on Equal”) orBNE(“Branch on Not Equal”)
and a jump may occur. So, this instruction pair has to be used in MIPS for comparison and branch. Let’s
first start with the signed version of our function:
Listing 1.116: Non-optimizing GCC 4.4.5 (IDA).text:00000000 f_signed: # CODE XREF: main+18
.text:00000000
.text:00000000 var_10 = -0x10
.text:00000000 var_8 = -8
.text:00000000 var_4 = -4