1.19. FLOATING-POINT UNIT
dword_528 DCD 0x40400147 ; DATA XREF: _main+10
a32_011_54Lf DCB "32.01 ^ 1.54 = %lf",0xA,0
; DATA XREF: _main+24
D-registers are not used here, just R-register pairs.
ARM64 + Optimizing GCC (Linaro) 4.9
Listing 1.208: Optimizing GCC (Linaro) 4.9f:
stp x29, x30, [sp, -16]!
add x29, sp, 0
ldr d1, .LC1 ; load 1.54 into D1
ldr d0, .LC0 ; load 32.01 into D0
bl pow
; result of pow() in D0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
ldp x29, x30, [sp], 16
ret
.LC0:
; 32.01 in IEEE 754 format
.word -1374389535
.word 1077936455
.LC1:
; 1.54 in IEEE 754 format
.word 171798692
.word 1073259479
.LC2:
.string "32.01 ^ 1.54 = %lf\n"
The constants are loaded intoD0andD1: pow()takes them from there. The result will be inD0after
the execution ofpow(). It is to be passed toprintf()without any modification and moving, because
printf()takes arguments ofintegral typesand pointers from X-registers, and floating point arguments
from D-registers.
MIPS
Listing 1.209: Optimizing GCC 4.4.5 (IDA)main:
var_10 = -0x10
var_4 = -4
; function prologue:
lui $gp, (dword_9C >> 16)
addiu $sp, -0x20
la $gp, (__gnu_local_gp & 0xFFFF)
sw $ra, 0x20+var_4($sp)
sw $gp, 0x20+var_10($sp)
lui $v0, (dword_A4 >> 16) ;?
; load low 32-bit part of 32.01:
lwc1 $f12, dword_9C
; load address of pow() function:
lw $t9, (pow & 0xFFFF)($gp)
; load high 32-bit part of 32.01:
lwc1 $f13, $LC0
lui $v0, ($LC1 >> 16) ;?
; load low 32-bit part of 1.54:
lwc1 $f14, dword_A4
or $at, $zero ; load delay slot, NOP
; load high 32-bit part of 1.54: