Assembly Language for Beginners

1.32. ARM-SPECIFIC DETAILS
C term ARM term C statement how it works
Post-increment post-indexed addressing ptr++ useptrvalue,
thenincrement
ptrpointer
Post-decrement post-indexed addressing ptr-- useptrvalue,
thendecrement
ptrpointer
Pre-increment pre-indexed addressing ++ptr incrementptrpointer,
then use
ptrvalue
Pre-decrement pre-indexed addressing --ptr decrementptrpointer,
then use
ptrvalue

Pre-indexing is marked with an exclamation mark in the ARM assembly language. For example, see line
2 in listing.1.29.

Dennis Ritchie (one of the creators of the C language) mentioned that it presumably was invented by Ken
Thompson (another C creator) because this processor feature was present in PDP-7^195 , [Dennis M. Ritchie,
The development of the C language, (1993)]^196.

Thus, C language compilers may use it, if it is present on the target processor.

That’s very convenient for array processing.

1.32.3 Loading a constant into a register.

32-bit ARM

As we already know, all instructions have a length of 4 bytes in ARM mode and 2 bytes in Thumb mode.

Then how can we load a 32-bit value into a register, if it’s not possible to encode it in one instruction?

Let’s try:

unsigned int f()
{
return 0x12345678;
};

Listing 1.406: GCC 4.6.3 -O3 ARM mode

f:
ldr r0, .L2
bx lr
.L2:
.word 305419896 ; 0x12345678

So, the0x12345678value is just stored aside in memory and loaded if needed.

But it’s possible to get rid of the additional memory access.

Listing 1.407: GCC 4.6.3 -O3 -march=armv7-a (ARM mode)

movw r0, #22136 ; 0x5678
movt r0, #4660 ; 0x1234
bx lr

We see that the value is loaded into the register by parts, the lower part first (usingMOVW), then the higher
(usingMOVT).

This implies that 2 instructions are necessary in ARM mode for loading a 32-bit value into a register.

It’s not a real problem, because in fact there are not many constants in real code (except of 0 and 1).

Does it mean that the two-instruction version is slower than one-instruction version?

Doubtfully. Most likely, modern ARM processors are able to detect such sequences and execute them fast.

On the other hand,IDAis able to detect such patterns in the code and disassembles this function as:

(^195) http://yurichev.com/mirrors/C/c_dmr_postincrement.txt
(^196) Also available ashttp://go.yurichev.com/17264