Assembly Language for Beginners

(nextflipdebug2) #1

11.6 8086 memory model.


can see here thenop.iinstructions (NOPat the place where the integer instruction might be) ornop.m
(a memory instruction might be at this slot).


NOPs are inserted automatically when one uses assembly language manually.


And that is not all. Bundles are also grouped.


Each bundle may have a “stop bit”, so all the consecutive bundles with a terminating bundle which has
the “stop bit” can be executed simultaneously.


In practice, Itanium 2 can execute 2 bundles at once, resulting in the execution of 6 instructions at once.


So all instructions inside a bundle and a bundle group cannot interfere with each other (i.e., must not have
data hazards).


If they do, the results are to be undefined.


Each stop bit is marked in assembly language as two semicolons (;;) after the instruction.


So, the instructions at [90-ac] may be executed simultaneously: they do not interfere. The next group is
[b0-cc].


We also see a stop bit at 10c. The next instruction at 110 has a stop bit too.


This implies that these instructions must be executed isolated from all others (as inCISC).


Indeed: the next instruction at 110 uses the result from the previous one (the value in register r26), so
they cannot be executed at the same time.


Apparently, the compiler was not able to find a better way to parallelize the instructions, in other words,
to loadCPUas much as possible, hence too much stop bits andNOPs.


Manual assembly programming is a tedious job as well: the programmer has to group the instructions
manually.


The programmer is still able to add stop bits to each instructions, but this will degrade the performance
that Itanium was made for.


An interesting examples of manualIA64assembly code can be found in the Linux kernel’s sources:


http://go.yurichev.com/17322.


Another introductory paper on Itanium assembly: [Mike Burrell,Writing Efficient Itanium 2 Assembly Code
(2010)]^3 , [papasutra of haquebright,WRITING SHELLCODE FOR IA-64(2001)]^4.


Another very interesting Itanium feature is thespeculative executionand the NaT (“not a thing”) bit,
somewhat resemblingNaNnumbers:
MSDN.


11.6 8086 memory model


When dealing with 16-bit programs for MS-DOS or Win16 (8.5.3 on page 832or3.29.5 on page 654), we
can see that the pointers consist of two 16-bit values. What do they mean? Oh yes, that is another weird
MS-DOS and 8086 artifact.


8086/8088 was a 16-bit CPU, but was able to address 20-bit address in RAM (thus being able to access
1MB of external memory).


The external memory address space was divided betweenRAM(640KB max),ROM, windows for video
memory, EMS cards, etc.


Let’s also recall that 8086/8088 was in fact an inheritor of the 8-bit 8080 CPU.


The 8080 has a 16-bit memory space, i.e., it was able to address only 64KB.


And probably because of reason of old software porting^5 , 8086 can support many 64KB windows simulta-
neously, placed within the 1MB address space.


This is some kind of a toy-level virtualization.


(^3) Also available ashttp://yurichev.com/mirrors/RE/itanium.pdf
(^4) Also available ashttp://phrack.org/issues/57/5.html
(^5) The author is not 100% sure here

Free download pdf