siliconchip.com.au Australia’s electronics magazine May 2019 31
rectly from the output (pin 1) of the preceding buffer, IC2a.
It may seem odd that the in-phase signal comes from
the output of the inverter, but this is because the follow-
ing filter stages are also inverting, so it will end up with
the same phase as the inputs, while the other signal will
be out of phase.
Both signals are then fed through identical buffer/filter
arrangements, built around IC4a and IC4b. These filters are
similar to what is recommended in the CS5361 data sheet
(Figure 24), but not exactly the same. The data sheet says:
“The digital filter will reject signals within the stopband
of the filter. However, there is no rejection for input signals
which are (n×6.144 MHz) the digital passband frequency,
where n=0,1,2, ... Refer to Figure 24 which shows the sug-
gested filter that will attenuate any noise energy at 6.144
MHz, in addition to providing the optimum source imped-
ance for the modulators.”
The main difference between our circuit and the recom-
mended circuit is that ours is inverting. While inverting
amplifiers introduce more noise than non-inverting ampli-
fiers, inverting amplifiers can have lower distortion due
to their near-zero common mode voltage. Also, the use of
inverting amplifiers allows us to easily provide a slightly
different DC bias to the two signals.
This is done one by connecting a low-value resistor
(8.2) between the non-inverting input pins (pins 3 & 5)
of op amps IC4a/IC4b, which are in series with a divider
across the supply rail (10k/10k).