62 Silicon chip Australia’s electronics magazine siliconchip.com.au
eo RAM pointer. This filtering checks
the three high order bits of each re-
ceived character. If all of these are low,
then received serial data ASCII value
is less than 32. That means that it is
a control byte and processed as such.
The control bytes work as follows.
A carriage return (code 13) causes the
video RAM pointer to be reset to the
start of its line by ANDing its value
with 32. A line feed (code 10) moves
the pointer to the next line by adding
32, and a form feed (code 12) moves the
cursor to position zero by resetting the
pointer, as though starting a new page.
If the received data value is 32 or
higher (and thus an ASCII character),
the received character is written to the
video RAM at a position correspond-
ing to the pointer’s value and the point-
er is incremented by one. Thus char-
acters received consecutively appear
at consecutive locations on the display
The currently selected foreground
and background colour combination is
also written to a separate RAM which
is used to later decode the colour data
for display.
Other control codes are decoded by
the small block to the left of the colour
decoder. Code 14 sets a flag so that the
background colour is set, while code
15 sets the flag to the foreground. If a
value from 16 to 31 is received, it is
sent to the foreground or background
register per the flag.
Because all except the lower four
bits are ignored here, code 16 selects
colour 0 and code 31 selects colour 15
from the palette.
Screen6 shows the default palette
of colours that are available.
The video RAM section takes an
address value made from combining
parts of the horizontal and vertical
‘scan’ position. The small code box on
the left just combines the bits to create
a linear address.Video RAM
The larger box is the video RAM
itself. This has been coded in a spe-
cific way to use part of the iCE40HX-
1k’s BRAM (block RAM). If not done
in quite the right way, the memory is
synthesised from flip-flops instead of
using the dedicated block RAM. This
alternative is a very poor use of re-
sources; as an experiment, we tried
this, and found that the 512 bytes of
RAM took about half of the FPGA’s
flip-flop resource.
The iCE40HX-1k contains 16 sepa-
rate 512-byte blocks of double-ported
RAM. The double-port feature means
that it can be read and written at the
same time, which is essential in our
application because we may be trying
to change the display at the same time
that the VGA display logic is reading
from it (as it is reading video RAM al-
most constantly).
The small beige block above the
video RAM initialises it at startup to
display some splash-screen text. If youdon’t want this, replace the contents
of the beige block with zeroes, or your
own hexadecimal values for a custom
splash screen.
The small block to the right of the
video RAM generates an address into
the font ROM, based on the ly displayed
character value from video RAM and
the vertical position of the scan.Font ROM
The font ROM consists of three
BRAM blocks, each fed by a separate
initialising block. While implemented
using RAM blocks, there are no con-
nections to the write lines, so they re-
main unchanged as long as the FPGA is
powered, and are effectively read-only.
By using multiple BRAM blocks and
a four-way multiplexer, we can over-
come the 512 byte limit of each block
(hint: this might be a good way to ex-
pand the video RAM). Each BRAM
block encodes 64 characters in eight
bytes each, for a total of 512 bytes.
There’s room to add a fourth BRAM
block below, but we only need 192
characters in the font ROM, so we have
not done so.
Each byte of the font ROM encodes a
horizontal line of eight pixels as a bit-
map. The small block next to the fontScreen4: the default character map/font for the iCEstick VGA
Terminal. It can be changed by editing the font ROM blocks.
The first three lines are the standard ASCII characters at
positions 32-127, followed by some pseudo-graphics charact-
ers that can be used to draw boxes, bar graphs and so on.
Screen5: the RX (receive) pin of the UART module can be changed using
this drop-down box. Not all pins in the list can be used; for example, we
are already using all the PMOD pins for the VGA output.