Custom PC - UK (2020-08)

(Antfer) #1

FEATURE / ANALYSIS


Ofcourse,anyonewhohasbeeninthe
PCgamelongenoughwillrememberwhen
USBfirststartedtakinghold,withsoftware
oftenneedingtobeinstalledbeforea USB
devicewaspluggedintoa PC,anddevices
regularlyjustdisappearingfromyoursystem.
It wasalldowntothefactthatextrasoftware
supportwasrequiredinorderforthesystem
tocorrectlyrecognisea deviceandroutedata
toandfromit. Withserial,thesystemhad
fixedportsandit justfiredthedatastraight
intowhateverwasconnectedtotheport,for
betterorworse.
WiththearrivalofUSB3,andthedesirefor
evergreaterdatatransferrates,extrawires
wereaddedtothestandard,withanother
twopairsofdatalinesadded.Theseallowed
fora muchfasterSuperSpeedtransfermode
(againenabledbyfurtherenhancementsin
chipdesignandsignalhandling)whilethe
existinglinescouldstillbeusedforlegacy
compatibility.That’swhyUSB3 B ports
havethatfunnydouble-deckershapeand
extracontacts.
ThemostrecentadditionhasbeenUSB
Type-C;strictlyspeaking,thisisn’ta USB
standardatall,butjusta physicalconnection
standardthatcanbeusedtotransmitUSB
data.Insidethattinyrotationallysymmetrical
connectorare24-pinsthatallowthe
connectortobeinsertedeitherwayround
andstillmaintainitsfull12-pinconnectionfor


conveyingthemajorityofhigh-speedUSB
standards.Infact,thelatestUSB3.2standard
evenusesthosespare 12 pinstodoublethe
datarate,soyouessentiallyhavea cable
that’srunningfourserialdatalinestogetherin
parallel.Themorethingschange...

Memory
AttheotherendofthescaletoUSB,system
RAM(andmostotherformsofRAM,suchas
VRAM)is oneofthelastholdoutsoflargely
conventionalparallelcommunicationinour
PCs.Thesheervolumeofdatathatneeds
tobesentbackandforthbetweentheCPU

andsystemmemorystilllendsitselfto
thisefficientmethod.Moreover,because
memoryis basicallya singular,dedicated
componentincloseproximitytotheCPU,it’s
possibletoengineerourwayaroundthecore
shortcomingsofparallelcommunication.
PCBtracescanbelaidouttoensuredata
pathwaysareconsistentandcrosstalk
is minimal,whiletheextraoverheadof
serialisingthedatatransferwouldonly
servetoholdupa lotofoperations.
Assuch,modernmemorycommunicates
witha CPU– whichthesedayshousesthe
memorycontroller– viaverywideparallel
interfaces.DDR4usesa 64-bitmemory
interfacewitha whopping260-pinphysical
connectiontothemotherboard.Internally,
theRAMtakesadvantageofdataparallelism
too,spreadingdatatransferrequestsacross
multiplebanksofintegratedcircuitson
eachmemorymoduleandacrossmultiple
memorymodules.Thisallowsthememory
tokeepthatincrediblyfastinterfacefedwith
data,whichwouldn’tbepossibleif it were
sendingallitsdatarequeststoa singlechip.
TheinterfaceonDDR4usesa clock
speedthat’stypicallyintherangeof1200-
2000MHz;thankstodata beingtransferred
onboththerisingandfallingedgesof
theclocksignal,thisresultsinthetypical
2400MHz-4000MHzdataratesweseefor
modernDDR4memory.

Dozens of data lines connect the RAM slots to the
CPU. Note the zigzag pattern in some, used to
ensure all the traces are the same length

The use of multiple serial lanes enables PCI-E
to scale its connection speed according to the
connected device

Free download pdf