PC World - USA (2020-12)

36 PCWorld DECEMBER 2020

REVIEWS AMD RYZEN 5000

far more flexibility in

yields and

construction. Zen 3,

for example, uses the

same IO die that

contains the PCIe 4.0

lanes and memory

controller as Zen 2.

This let AMD get its

newest cores into

existing sockets and

motherboards

without disturbing

everything

underneath it.

With previous Ryzen chips, each CCX was

constructed of four x86 cores, which were

connected to a second CCX to make a core

chiplet die (CCD).

This design lead to a

latency cost when the

cores had to

communicate outside

of the 4-core CCX.

AMD said it has

measured this latency

in a range from 78ns

to 95ns. With the

unified 8-core CCX,

the latency is

essentially eliminated.

Another benefit

of the new unified 8-core CCX is more

available L3 cache. The previous design gave

each 4-core CCX 16MB of L3 cache, but it

couldn’t be shared. By combining all of the