Elektor_Mag_-_January-February_2021

70 January & February 2021 http://www.elektormagazine.com

cies there is no problem. Signals with less than three zero-crossings

during the sampling period are treated as DC.

The second question is how many samples will be taken in these

35 ms. A sampling frequency of 10 kHz or higher would be ideal. I have

chosen for 357 samples at 10.2 ks/s. This leads to a integer multiple

of samples for 50 and 60 Hz signals. These frequencies can then be

analyzed with the highest accuracy.

There is a library with I2C commands in mikroBasic, but these are only

for an I2C master. For an I2C-slave I had to write my own procedures.

These procedures are needed to setup and control the communi-

cation with the main board, the I2C master. The latter just requests

and displays information from the satellite boards, (auto-) ranging

and offset, all signal processing, including sampling and filtering is

performed on the satellite board(s).

Unfortunately I forgot some decoupling capacitors in the supply part,
these had to be added too. The part list for this project in Open Office
format can be downloaded from [2]. Order codes for Farnell are given,
but of course you can choose any supplier.

Software for the satellite board
The program is written in mikroBasic for PIC (V5.6.1) from MikroElektronika,
a programming language that is relatively easy to understand.
I wanted that a frequency range from (a bit) less than 50 Hz to a few
hundreds of Hz could be processed. Therefore, the signal needed to
be sampled for at least 30 ms. Then, at 50 Hz there are at least three
zero-crossings, so you can detect one period. But that is only true when
these zero-crossings are equidistant. With a duty cycle unequal to 50 %
at 50 Hz, 30 ms is not sufficient, that’s why I have chosen for 35 ms.
Then with a duty-cycle of less than 25 % there it is possible that the
frequency is not correctly determined at 50 Hz, with higher frequen-

Mikroe-240SMT

LCD1

CS1CS2GNDVCC R/W RSTVEELED+LED-

TP1

TP2

TP3

TP4

VORS D0

10

D1

11

D2

12

D3

13

D4

14

D5

15

D6

16

D7

17181920

Y1

X1

Y2

X2

12345678

E

9

PIC18(L)F46K22TQ

MCLR

IC5

RC6

RC5

RC3

RD0

RD3

RD1

RD2

RD7

RD6

RD5

RE2

RB5

RB6

RC0

RC1

RC7

RC4

RB7

RE1

RC2

RD4

VDD

VSS

RB4

RB0

RB1

RB2

RB3

VDD

VSS

RA2

RA1

RA4

RA0

RA7

RA5

RA3

RA6

RE0

1 5

4 0

4 1

3 9

3 8

1 6

1 7

4 3

3 7

4 4

1 8

3 6

2 6

3 5

4 2

3 2

2 7

1 4

1 0

1 1

7

2 9

2 1

2 0

2 3

1 9

3 0

2 4

2 2

3 1

2 5

5

4

3

2

6

2 8

1

8

9

R40

39

R41

39

C23

100n

C24

100n

+5V

J 5

J 4

R34

100

10kR35

MAX1MAX2

R38

10k

R39

10k

J 6

J 8

J10

J11

J12

100 R37

R36 100

JP1

1

2

3

4

5

6

RD0

RD1

RD2

RD3

RD4

RD5

RD6

RD7

RD0RD1RD2RD3RD4RD5RD6RD7

R14

39

C 8

100n

+5V

R15

10k

R 7

120

R11

120

R16

120

R18

120

+12V-IN

T5

BC848C

T4

BC858

T6

BC858

T7

BC848C T8

BC848C

R2110k

R2210k

R23

10k

R25

10k

R29

10k

R19

1k

R20

1k

R17 39

R26

100k

R30

100k

R 7

1k

J 2

J 3

C17

100n

C19

100n

+5V

J 7

J 9

(^2) RT
(^1) DT
GD2^5
(^3) OC
(^4) SS
GND^6
VCC^7
IC1GD1^8
UCC25600
R 610k
R 81k5
C 5 100n
C 3 100n
R 2
39
+12V-IN
T1
SBSH105
D
G
T3
BSH105S
D
G
T2
BSH105S
D
G
R10
0
C 6
470p
R12 10
R 4
100
R13
10k
C 7
100n
D 2
R 9
10k
R 5
2k2
C 4
100n
D 1
D1, D2 = PMEG3020EH
R 3
2k2
R 1
39
C 1
(^1000) 16V
1 X1 2
3 4
5 6
1 X3 2
3 4
5 6
1 X4 2
3 4
5 6
C 9
1
C14 1
C18
1
J 1
+5V
L78M12CV
IC2
C10
100n
C11
330n
C12
330n
L1 150 H
L2 150 H
X2
SJ1
L78M05ACDT
IC3
C15
330n
C16
330n
R24
39
+5V
190133-011
C 2
100n
C13
100n +12V-IN
Figure 3: Satellite board schematics.