188 Electrical Power Systems Technology
put, as shown in Figure 7-23B. Of course, the voltages appearing across
the diodes are 120° out of phase. There is a period of time during each AC
cycle when the positive alternations overlap one another, as shown in the
shaded areas of the diagram (Figure 7-23B). During the overlap time peri-
od t 1 , the phase A voltage is more positive than the phase B voltage, while
during the t 2 , interval, the phase B voltage is more positive. Diode D1 will
conduct until the time period t 1 ends, then diode D 2 will conduct, begin-
ning at the end of t 1 until the next area of overlapping is reached.
Note that voltage across the load device rises to a peak value twice
during each phase alternation of the AC input voltage. These peaks are
Figure 7-23. Three-phase half-wave rectification: (A) Schematic diagram, (B)
Input/output voltage waveforms