Game Engine Architecture

326 7. The Game Loop and Real-Time Simulation

Main RAM

(512 MB)

PowerPC

Core 0

PowerPC

Core 1

PowerPC

Core 2

L1

Data

L1

Instr

L1

Data

L1

Instr

L1

Data

L1

Instr

Shared L2 Cache

GPU

Figure 7.4. A simplifi ed view of the Xbox 360 hardware architecture.

a great deal more depth in the PowerPoint presentation entited “Xbox 360

System Architecture,” by Jeff Andrews and Nick Baker of the Xbox Semicon-

ductor Technology Group, available at htt p://www.hotchips.org/archives/

hc17/3_Tue/HC17.S8/HC17.S8T4.pdf. However, the preceding extremely brief

overview should suffi ce for our purposes. Figure 7.4 shows the Xbox 360’s

architecture in highly simplifi ed form.

7.6.1.2. PLAYSTATION 3

The PLAYSTATION 3 hardware makes use of the Cell Broadband Engine

(CBE) architecture (see Figure 7.5), developed jointly by Sony, Toshiba, and

IBM. The PS3 takes a radically diff erent approach to the one employed by the

Xbox 360. Instead of three identical processors, it contains a number of diff er-

ent types of processors, each designed for specifi c tasks. And instead of a uni-

fi ed memory architecture, the PS3 divides its RAM into a number of blocks,

each of which is designed for effi cient use by certain processing units in the

system. The architecture is described in detail at htt p://www.blachford.info/

computer/Cell/Cell1_v2.html, but the following overview and the diagram

shown in Figure 7.5 should suffi ce for our purposes.

The PS3’s main CPU is called the Power Processing Unit (PPU). It is a

PowerPC processor, much like the ones found in the Xbox 360. In addition

to this central processor, the PS3 has six coprocessors known as Synergistic

Processing Units (SPUs). These coprocessors are based around the PowerPC

instruction set, but they have been streamlined for maximum performance.

The GPU on the PS3 has a dedicated 256 MB of video RAM. The PPU has

access to 256 MB of system RAM. In addition, each SPU has a dedicated high-

speed 256 kB RAM area called its local store (LS). Local store memory performs

about as effi ciently as an L1 cache, making the SPUs blindingly fast.