FET Fundamentals Unit 7 – Hartley and Colpitts Oscillators
Exercise 1 – Hartley Oscillator Operation
EXERCISE OBJECTIVE
When you have completed this exercise, you will be able to demonstrate the operation of a
typical JFET Hartley oscillator by using a test circuit. You will verify your results with a
multimeter and an oscilloscope.
EXERCISE DISCUSSION
- This JFET Hartley oscillator is shunt fed and uses an LC tank circuit to set the oscillator
frequency. - C1 and C2 are dc blocking capacitors and prevent dc current from flowing through the tank
circuit. - CS and L1 are used to decouple the dc power supply to prevent circuit oscillations on the
power supply (VDD). - For ac signals the impedance of CS is low and the impedance of L1 is high.
- The JFET in this circuit is the active component and is a source-biased amplifier.
- The oscillator circuit frequency is determined by the components of the tank circuit (C3, C4,
L2 and L3). The resonant frequency can be determined using this formula. fr = 1 / (2LC)
where L = L2+L3 and C = (C3xC4) / (C3+C4) - The ac feedback signal is from the inductor divider circuit (L2 and L3) within the tank
circuit. The ac voltage across L3 is the available feedback. The amount of feedback is set by
the feedback adjust circuit (R2 and R3). - The oscillator becomes self-driven when enough signal is fed back and the feedback is
regenerative. - JFET source bias is developed across R1 and is essentially in phase with the output voltage.
- External circuit connections to the LC tank will cause loading effects. In practical oscillators,
the LC tank circuits are isolated to prevent loading.