Digital Logic Fundamentals Unit 4 – Open Collector and Other TTL Gates
For a Schmitt-trigger LS gate, the input voltage levels at which the input is in a low, locked out,
or high logic state are shown.
With a Schmitt-trigger gate, the output logic state will not change until the input voltage
increases to the upper trip point of 1.6V. This is the positive-going threshold voltage (VT+).
When the input voltage decreases, the output will not change until the input voltage decreases to
the lower trip point of 0.8V.
This is the negative-going threshold voltage (VT-).
Positive feedback (hysteresis) is used in the Schmitt-trigger gate circuit.
Input voltages between VT- and VT+ are locked out and will not cause false output states if the
inputs have slow rise and fall times or if the input signal contains noise.
A Schmitt-trigger device is identified by a hysteresis loop on the device symbol, as shown.