Chapter 7: Microcontroller Interrupts and Timers
of CLKPR is the prescaler enable bit, CLKPCE (an alias for bit
), so the statement:
factor.
ince registers are preset to 0, we OR CLKPS1 and CLKPS0 as 1 and get 0011
is set to 0 to disable the
e, interrupts (p 141 data
ils).
Timer/Counter2, AS2, bit 3 of the Asynchronous
llow an external clock connected to the Timer
24 of the microcontroller to be used to for asynchronous
s a value, 200, that will be
ontinuously compared with the Timer Count 2, TCNT2, register
, TIMSK0, is set to 0 to delete any
The Clock Prescale Register, CLKPR, is discussed beginning on page 30 of the
data book. Bit 7
7
CLKPR = (1<<CLKPCE);
enables the Clock Prescaler Change.
The Clock Prescaler Select Bits CLKPS0, CLKPS1, CLKPS2, and CLKPS3 are
alias for the lower 4 bits of CLKPR and are used to select a clock division
S
which provides a clock division factor of 8, this divides the 8 MHz oscillator by 8
giving a 1 MHz clock:
CLKPR = (1<<CLKPS1) | (1<<CLKPS0);
The Timer/Counter2 Interrupt Mask Register, TIMSK2,
OCIE2A, output compare, and TOIE2, overflow enabl
book if you want the gory deta
TIMSK2 = 0;
We must set the Asynchronous
State Register, ASSR, to a
Oscillator, TOSC1, pin
operation of timer2 (32,768kHz):
ASSR = (1<<AS2);
The Output Compare Register A, OCR2A, contain
c
OCR2A = 200;
The Timer/Counter0 Interrupt Mask Register
interrupt sources (p 93 data book).
TIMSK0 = 0;