SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

(Greg DeLong) #1
262 CHAPTER 6. BIPOLAR JUNCTION TRANSISTORS

[ ( ) ] IR = ICS[ ( ) ]exp^ –1


αRIR αFIF

VΒΕ









VΒC
+ –

IΕ IC
E C

IR

IF = IES exp eVBE –1
kBT

eVBC
kBT

IF

B

Figure 6.10: The Ebers-Moll equivalent circuit of a bipolar transistor looks at the device as made
up of two coupled diodes.


Using this equation to eliminateIEfrom equation 6.3.20, we can obtain the values ofVBEand
VBCin terms ofIC,IB, and the parametersIES,ICS,αR,andαF.ThisgivesforVCE(sat)


VCE(sat)=VBE−VBC=

kBT
e

n

[

IC(1−αR)+IB
αFIB−(1−αF)IC

·

ICS

IES

]

(6.3.27)

Substituting forICS/IESfrom equation 6.3.24, we get


VCE(sat)=

kBT
e

n

[

IC(1−αR)+IB
αFIB−(1−αF)IC

·

αF
αR

]

(6.3.28)

Typical values ofVCE(sat)are 0.1 to 0.2V, as can be seen in example 6.2.


6.4 DEVICE DESIGN AND DEVICE PERFORMANCE PA-


RAMETERS


In this section we will examine how device design influences performance of a BJT. Through
material and geometric parameters we can control are doping densities, base width, device area,
and in some cases material choice (e.g. Si or GaAs etc.). Usually it would be difficult to change
the material system since it is difficult to alter the processing technology. The main performance
parameters one wants to improve are the current gain, and device operation frequency. Addition-
ally there are issues related to high voltage biasing that we will discuss later. We will focus on

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