SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

7.2. MODULATION AND SWITCHING OF AP-NDIODE: AC RESPONSE 305

clock clock

clock clock

Ref Ref,clk Ref Rdata RefRef,clk Ref

Rclk Rclk

to buffer

R,load

R,load R,load

R,load

R,load

oad,lR

efR ef,clkRefR dataR efR ef,clkR efR

load,R

oad,lR

L,peak

L,peak

L,peak

peak,L

L,peak

peak,L

peak,L

L,peak

Q1

Q3

Q2

Q4

Q5

Q6

clkR clkR

Inductor

HBT

Resistor

(a)

(b)

Figure 7.1: (a) Photograph of a 142 GHz master-slave latch, along with (b) the corresponding
circuit diagram. The circuit is based on the InP HBT technology illustrated in figure 7.1 Figures
courtesy of M. Rodwell and Z. Griffith, UCSB.