SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

(Greg DeLong) #1
328 CHAPTER 7. TEMPORAL RESPONSE OF DIODES AND BIPOLAR TRANSISTORS

RC

B

E

C

RE

AC short

Figure 7.11: Biasing circuit for calculation ofτBC 1.

accommodate the mobile charge. Stated differently, each electron introduced into the base-
collector depletion region must be imaged at the depletion edges. Because the induced
charge due to this effect at both ends of the depletion region ispositive, the total charge
at the base endincreases, while the charge at the collector enddecreases in magnitude
(becomes less negative). Hence referring to figure 7.7b,ΔQBC=ΔQ


BC. Since the
charge at the base end (ΔQBC) is the one which must be supplied at the input to induce
a change in the output current, it is this charge that we are interested in calculating. We
will call the change in the base-collector depletion charge associated with finite electron
velocity in the collector,ΔQC.

The total change in charge in the base-collector depletion regionΔQBC=ΔQBC 1 +ΔQC.
We will split the base-collector delay into two components,τBC=τBC 1 +τC,where


τBC 1 =

ΔQBC 1

ΔIC

(7.5.10)

τC=

ΔQC

ΔIC

(7.5.11)

τCis commonly referred to as the collector delay. To determineτBC 1 , we refer to the circuit
shown in figure 7.11. Delay analysis is by convention carried out with the collector incrementally
shorted to the emitter. Assuming a change in the base-emitter voltageΔVBEleads to a change
in collector currentΔIC, we can write the following expression forΔVBC.


ΔVBC=ΔVBE+ΔIC(RE+RC) (7.5.12)

By definition,
ΔQBC 1 =CBCΔVBC (7.5.13)

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