SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

364 CHAPTER 8. FIELD EFFECT TRANSISTORS

n+

Conducting channel

Substrate

SDG

Conducting channel

Substrate

G

(a)

(b)

n+

n+ n+

Source–drain bias

is zero

Source-drain bias

is nonzero

Figure 8.7: A schematic of a MESFET showing the depletion width under the gate. (a) In the
absence of a source-drain bias, the depletion width is uniform and is controlled by the gate bias.
(b) In the presence of a source-drain bias, the depletion width is greater in the drain side.

pointxalong the channel, is given by the potential at that point using the simple one-

dimensional results.

Both the approximations given above are reasonable only if the channel fields are small.

These approximations do not work for modern devices and we will discuss a better model

later.