SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

8.7. DESIGN ISSUES IN HFETS 401

(a)

(b)

GaN

AlGaN

SOURCE GATE DRAIN

FP x

y

z

y

FP

GATE

GaN

AlGaN

SOURCE GATE DRAIN

FP

FP2

GaN

AlGaN

SOURCE GATE DRAIN

FP1

Gate

FP1

FP2

FP3

(c)

Figure 8.28: Various field plate configurations. (a) Gate-terminated field plate. (b)Source-
terminated field plate. (c) Multiple field plate structure. SEM image courtesy of Y. Dora,UCSB.

8.7.5 FieldPlates.................................

One can actively control the gate extension beyond the drain edge of the gate and thereby
reduce the peak electric field by using field plate structures. This is advantageous for applica-
tions such as high voltage switching and high power amplifiers, in which very high breakdown
voltages are necessary. For this reason, field plates have become especially popular for HFETs
in the GaN-based material system. There are a number of methods of implementing field plates,
a few of which are shown in figure 8.28. One can have a dielectric-assisted extension of the gate
toward the drain (i.e. a gate-terminated field plate). The gate extension effectively modulates the
channel beyond the primary gate, thereby spreading the electric field between two peaks, one at
the gate edge and the other at the edge of the termination, as shown in figure 8.32. The penalty
for this approach is the enhanced gate-drain feedback capacitanceCGD.
Field shaping can also be achieved by utilizing a field plate connected to the source, as shown
in figure 8.28b. Here, image charges on the plate result in an enhanced drain-source capacitance