SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

436 CHAPTER 9. FIELD EFFECT TRANSISTORS: MOSFET

Figure 9.3: Illustration of Moore’s Law.

PMOS

+VDD

n-type body

p well

Hole conduction

SiO 2 SiO 2

Source Gate Drain

p+ p+ n+ n+

Drain

PMOS NMOS

Gate Source

SiO 2

Electron conduction

NMOS

(a)

(b)

++++ ––––

Figure 9.4: (a) A cross-section of a CMOS device. (b) Symbol representing the CMOS.