Formats and Protocols
Some knowledge of how serial data transmits is useful in selecting a protocol
and interface for a project and in debugging.1
Figure 2-1B shows how a byte transmits in 8-N-1 format. When idle, the trans-
mitter’s output is a logic 1. To indicate the beginning of a transmission, the
transmitter sends a logic 0 for one bit width. This is the Start bit. At 9600 bps,
a bit is 104 μs.
After the Start bit, the transmitter sends the 8 data bits in sequence, beginning
with the LSb. The transmitter then sends a logic 1, which functions as the Stop
bit. Immediately following the Stop bit or at any time after, the transmitter can
send a new Start bit to signify the beginning of a new transmitted word.
At the receiving computer, the transition from logic 1 to the Start bit’s logic 0
indicates that a new word is arriving. The transition and the bit rate determine
the timing for detecting the bits that follow. The receiver attempts to read the
logic state of each bit near the middle of the bit’s time period. Reading in the
middle of the period helps ensure that the receiver detects the bit values cor-
rectly even if the transmitting and receiving clocks don’t exactly match in fre-
quency or phase.
RS-232 uses inverted polarities from those shown in Figure 2-1B. An RS-232
Stop bit is a negative voltage and an RS-232 Start bit is a positive voltage.
RS-232 interface chips invert the signals and convert to the appropriate voltage
levels.1
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3
1
A UART typically uses a receive clock with a frequency 16 times faster than the
highest supported bit rate. If the highest bit rate is 9600 bps, the receive clock
should be at least 153,600 bps. As Figure 2-2 shows, after detecting the transi-
tion that signals a Start bit, the UART waits 16 clock cycles for the Start bit to
end, then waits 8 more cycles to read bit zero in the middle of the bit. The
UART then reads each bit that follows 16 clock cycles after the previous bit.
If the transmitting and receiving clocks don’t match exactly, the receiver will
read each new bit closer and closer to an edge of the bit. To read all of the bits
in a 10-bit word correctly, the transmit and receive clocks should vary no more
than about three percent. With greater variation, by the time the receiver tries