Chapter 2
to read the final bits, the timing may be off by so much that the receiver will
read the wrong bits and might not detect the Stop bit. The clocks need to stay
in sync only for the length of a word because each word begins with a new Start
bit that resynchronizes the clocks.
Because of the need for accurate timing, asynchronous interfaces require stable
timing references such as crystal oscillators. For best accuracy, the clock’s fre-
quency divided by 16 should be an integer multiple of the highest bit rate the
UART supports. For example, the UARTs in early PCs used a 1.8432-MHz
crystal. The crystal’s frequency divided by 16 equals the common bit rate of
115,200 bps. Newer UARTs often use an 18.432-MHz crystal to enable sup-
porting higher bit rates while allowing compatibility with earlier UARTs.
In a microcontroller, the chip’s main timing crystal usually serves as a reference
for hardware timers that control the UART’s clock. Some microcontrollers,
such as Microchip Technology’s PIC18F4520, have an internal frequency mul-
tiplier that provides a timing reference four times as fast as the external oscilla-
tor’s frequency.
To reduce errors, many UARTs take three samples in the middle of each bit and
use the logic level that matches two or more of the samples. To avoid detecting
brief noise glitches as Start bits, some UARTs read the Start bit a second time in
the middle of the bit and accept the Start bit only if the bit has remained a logic
low.Figure 2-2: To determine when to send data and read received data, the transmitter
and receiver each use a clock that is typically 16 times the bit rate.