PRELIMINARY BETA. NOT FOR REDISTRIBUTION.
The Hardware Book is freely distributable but is copyrighted to Joakim Ögren. It may not be modified and re-distributed without the authors permission.
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Chapter 1: Connector Menu Miniature Card (Tech) Connector
Miniature Card (Technical)
This section is currently based solely on the Miniature Card specification v1.1.
Signal Descriptions:
A0-A24
Address A0 to A24 are the address bus lines that can address up to 32 Mwords (64 MBytes).
The Miniature Card specification does not require the Miniature Card to decode the upper
address lines. A 2 Mbyte Miniature Card that does not decode the upper address lines would
repeat its address space every 2 Mbytes. Address 0h would access the same physical
location as 200000h, 400000h, 600000h, etc.D0-D15
Data lines D0 through D15 constitute the data bus. The data bus is composed of two bytes,
the low byte D[7:0] and the high byte D[15:8].OE#
OE# indicates that the current bus cycle is a read cycle.
WE#
WE# indicates that the current bus cycle is a write cycle.
VS1#
Voltage Sense 1 signal. The card grounds this signal to indicate it can operate at 3.3 Volts.
This signal must either be connected to card GND or left open.VS2#
Voltage Sense 2 signal. The card grounds this signal to indicate it can operate at x.x Volts
(the value to be determined at a later date). This signal must either be connected to card
GND or left open.CEL#
CEL# enables the low byte of the data bus (D[7:0]) on the card. This signal is not used in
DRAM cards.CEH#
CEH# enables the high byte of the data bus (D[15:8]) on the card. This signal is not used in
DRAM cards.RAS#
RAS# strobes in the row address for DRAM cards.
CASL#
CASL# strobes in the low byte column address for DRAM cards.
CASH#
CASH# strobes in the high byte column address for DRAM cards.
RESET#
RESET# controls card initialization. When RESET# transitions from a low state to a high
state, the Miniature Card must reset to a predetermined state.