504 Chapter 8. Signal Processing
to completely discharge the capacitor having capacitanceC.HereVinis the
input voltage. Since this time is proportional to the digital counter therefore
the final digitized word is proportional to the input voltage (see also Fig.8.7.8).
Cm Si
Vt
Stretcher
Pulse
Register
Counter/
Clock
Output
Comparator
Digital
Analog
Input
(a)
+ +
− −
Analog
Input
s
(b)
h
r
Figure 8.7.7: (a) Schematic
of a Wilkinson ADC. Cmis a
memory capacitor, Siis a cur-
rent source, andVtis the refer-
ence voltage used by the com-
parator to make the conversion
start/stop decision. Normally
Vtis kept at the ground poten-
tial, in which case the compara-
tor is called a zero-crossing com-
parator. (b) Sketch of a simple
sample and hold circuit that can
be used as a pulse stretcher in
Wilkinson ADC.
td
Sample Hold Digitize
Vin
V(t)
t
Figure 8.7.8: Conversion cy-
cle of a typical Wilkinson ADC.
The input pulse amplitude is
sampled and held on a capacitor
and then digitized. The digiti-
zation timetdis proportional to
the input voltageVin.
A big disadvantage of Wilkinson A/D technique is its long conversion time, which
can be calculated from
Tconv=2nTclock=
2 n
fclock
, (8.7.3)
wherenis the ADC resolution in bits andTclockis the period of counter’s clock
having frequencyfclock. Hencea12bit(n= 12) Wilkinson ADC having a clock
frequency of 100MHzwill complete one conversion in about 41μs,whichisa