Programming and Graphics

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14 Introduction to C++ Programming and Graphics


RAM is commonly called “system memory” or “internal memory.” Input
is sent to the RAM from the CPU through theaddress busandcontrol bus,and
information is returned through thedata bus. RAM memory is non-permanent
and volatile; when the computer is switched off, the information disappears.
RAM cells are organized in RAM units with different architectures.


RAM should be distinguished from the CPU register memory residing
inside the processor. C++ has direct access to both.


SRAM,DRAM,andcache


The fundamental element of the static RAM (SRAM) is thestorage cell
unitconsisting of a number of memory cells, each recording one bit in a flip-flop
switch. Address lines transmit information regarding the address where infor-
mation will be recorded or retrieved, read-write control lines dictate whether
information will be recorded or retrieved, and data lines transfer the data either
way. Other devices incorporated in the storage cell unit include the address
register and decoder, the memory buffer register, and drivers in the form of
transducers or amplifiers. The SRAM unit preserves its content as long as
electricity is supplied, and loses its content when the computer is powered off.


The vast majority of system memory consists of dynamic RAM (DRAM).
This inexpensive alternative differs from the SRAM in that each bit is stored
as charge in a capacitor. Each DRAM cell incorporates a capacitor used to
store the bit, and a transistor used to modify or retrieve the bit. A pulse of
electrical current constantly refreshes the memory cells; when the pulse is lost,
information is irreversibly erased. Every time information is read, the capacitor
holding the data is discharged. DRAM is packaged in 30-pin or 70-pin single
in-line memory modules (SIMM) or dual in-line memory modules (DIMM).


Other types of RAM memory include the level 1 (L1) or 2 (L2) cache
memory consisting of SRAM cells. Because this memory is closer to the CPU,
it has a much shorter access time. L1 cache memory is described as the “inter-
nal memory” of the CPU, whereas L2 cache memory is described either as the
“secondary cache” or as the “external memory” of the CPU. Newer designs in-
corporate level 3 (L3) and level 4 (L4) cache memory. Preserved RAM (PRAM)
runs on a battery, and its content is preserved even after the main power has
been disconnected.


ROM system memory


A small amount of memory is designated as read-only memory (ROM),
meaning that the information stored can be read but not modified. Like RAM,
ROM addresses can be accessed at about the same amount of time. Many
electronic devices such as hand-calculators and clocks use ROM. In a computer,

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