Introduction to Electric Circuits

4.6 Series-parallel a.c. circuits 95

and

Bc = 1/Xc = 1/(1/2".'fC) = 2rrfC = 27r 4 x 10 3 x 10 x 10 -6 = 0.25 S

so that

Y = (0.2 + j 0.25) S = 0.32/_51.34 ~ S
Let the voltage be the reference so that V = 24/_0~ Then the current
I = VY = 24 x 0.32/__(0 + 51.34) = 7.68/_51.34 ~ A. This indicates that the cur-
rent leads the voltage as is to be expected in a capacitive circuit.

4.6 SERIES-PARALLELA.C. CIRCUITS

The circuit of Fig. 4.35(a) consists of a capacitor C in parallel with an inductor L

and a resistor R in series. The phasor diagram is shown in Fig. 4.35(b).

To draw the phasor diagram we first choose V to be the reference since this is

common to both branches. The current Ic through the capacitor will be 90 ~

Figure 4.35

I

R

vtO

V L L

i

IC I~.~

I-I \ ~ ~. V (reference) ,..

~~\ "~. "- ME

]! ~ vR ~ -"~$ : Ic

IL sin eL IL COS (1)L

(a) (b)

ahead of V. The current IL through the inductor and resistor will be 4~L behind V
where 4u - tan -~ (toL/R). The current IL is now taken as a reference for the RL
branch.
We can draw the voltage drop VR(--ILR) in phase with the current IL which
produces it and the voltage VL(=ILtoL) 90 ~ ahead of the current IL which
produces it. The phasor sum of VR and VL must be V, the total circuit voltage,
and the phasor sum of Ic and IL is I, the total circuit current.
The phase angle of the circuit is 4~ and is shown to be lagging V. In practice of
course whether the total current is leading or lagging will depend upon the
relative magnitudes of Ic and the quadrature component of IL (i.e. IL sin 4u
If Ic > IL sin 4h~ then I will lead V and the circuit is predominantly capaci-
tive.
If Ic < IL sin 4~L then I will lag V and the circuit is predominantly inductive.
If 1c - IL sin 4~L then I is in phase with V and the circuit behaves as a pure
resistor.
From the geometry of the phasor diagram