854 Chapter 25
ance question becomes self-defeating eventually. The
more current is chucked around, the worse the ground
noise is going to become.
25.9.6 Practical Matrix Example
The 4000 series of CMOS devices, which are very
commonly used, have one important feature at odds
with general mixer technology—their maximum supply
voltages. The earlier 4000A series were limited to a
15 Vdc total (as compared to the 30 Vdc or 36 Vdc total
commonly used in console design), while the more
recent buffered B series can stand 18 Vdc. More recent
families (HC, e.g.) nearly always adhere to the common
digital electronics supply of 5 V (actually 7 V max). An
advantage of the earlier series was that a separately
regulated 5 V supply wasn’t necessary. Nowadays,
though, there is nearly always 5 V running around for
this, that, or the other and it is not a difficulty to create a
sufficiently well-regulated and quiet 5 V supply for HC
switches. Given the virtual-earth switching technique
described, this diminution of supply is immaterial.
Most CMOS families have a wide range of switch
configurations available; some specialist devices inte-
grate quite large arrays. By way of example, Fig. 25-33
shows one mixer channel’s worth of a digitally assigned
32-track routing matrix, designed around a pair of
Harris HI506A 16-way multiplexers. This part, for
example, contains 16 analog transmission gates tied to
one common output (which we will rename input). Each
of the free ends of the gates ties directly to a mix bus.
They all share a common series source resistor via the
input port. Since only one of these gates can be open at
a time (the one corresponding to the binary 4-bit
address code on the address inputs), there is no possi-
bility of two or more buses being inadvertently shorted.
The device manufacturers proudly point out the
break-before-make delay in switching, meaning that a
newly selected gate waits until the previous one has
delatched, so there is no momentary switching short.
25.9.7 Matrix Crosstalk
Crosstalk with this configuration, which you will notice
is a variation between Figs. 25-32A and C, is extremely
good. Again, there is the double attenuation of the series
resistor via an on-gate to a virtual-earth bus (some 20 dB
isolation to start with), followed by the internal isolation
between buses owing to the off-gate impedances into all
the other virtually zero-impedance mixing buses (some
additional 70–80 dB). A slightly more critical crosstalk
situation could exist when all the gates are turned off (by
tying the HI506A enable low) since the first set of atten-
uation no longer exists; the switches’ common point
would no longer be tied to a virtual earth by any of the
elements. This is why external switching elements (IC3a
and IC3b) are arranged to tie the end junction of the
series resistor and the HI506A input common point to
ground whenever the enable lines are low.
Crosstalk is now completely down to the intercon-
nections to this card, power supply decoupling, solid
and correct ground paths, but mostly inductive and
bus/earth/bus eddy-current coupling between the
virtual-earth buses themselves. This is yet another
design area where performance is completely deter-
mined by mechanical considerations.25.9.8 16-Track or 32-Track RoutingThe switching card described above may be configured
merely by changing two wire links in two different
routing formats. The first enables a stereo pair of signals
(i.e., the panned outputs of a channel) to be routed to
adjacent odd/even pairs of outputs (i.e., 1 and 2, 7 and
8, 27 and 28, and so on), where the odd numbers repre-
sent left and the even numbers represent right. Either
odds or evens may be accessed singly by suitable feeds
to the odds enable and evens enable control inputs.
Quite obviously these also facilitate disabling (turning
off completely) the routing.
A 4-bit binary control bus selects which pair of the
possible 16 pairs may be accessed, so these six control
lines are all that need to be extended to the channel
module where simple switching performs all routing
requirements.
When the aforementioned wiring links are made in
the fashion shown in Fig. 25-33, the card becomes
configured as a 1-source-into-32 destination switcher,
necessitating some control function changes. Evens
enable becomes the additional highest significant bit of
the destination address code (5 bits are needed for 32
combinations), while odds enable turns into the
enable/disable control of the switcher. (The benefit, in
both modes, of disabling the switcher when not actually
in use is that it removes the feed totally from the desti-
nation buses. Their performance is not impaired at all,
and a preselected routing setup on the address lines is
not disturbed.) With the same signal applied to both the
audio inputs, it is now possible to access any one of the
32 buses singly.