CHAPTER 17. FLOATING-POINT UNIT CHAPTER 17. FLOATING-POINT UNIT
dbl_2F90 DCFD 32.01 ; DATA XREF: _main+6
dbl_2F98 DCFD 1.54 ; DATA XREF: _main+E
As it was mentioned before, 64-bit floating pointer numbers are passed in R-registers pairs. This code is a bit redundant
(certainly because optimization is turned off), since it is possible to load values into the R-registers directly without touching
the D-registers.
So, as we see, the_pow function receives its first argument inR0andR1, and its second one inR2andR3. The function
leaves its result inR0andR1. The result of_powis moved intoD16, then in theR1andR2pair, from whereprintf()
takes the resulting number.
17.6.3 ARM + Non-optimizing Keil 6/2013 (ARM mode).
_main
STMFD SP!, {R4-R6,LR}
LDR R2, =0xA3D70A4 ; y
LDR R3, =0x3FF8A3D7
LDR R0, =0xAE147AE1 ; x
LDR R1, =0x40400147
BL pow
MOV R4, R0
MOV R2, R4
MOV R3, R1
ADR R0, a32_011_54Lf ; "32.01 ^ 1.54 = %lf\n"
BL __2printf
MOV R0, #0
LDMFD SP!, {R4-R6,PC}
y DCD 0xA3D70A4 ; DATA XREF: _main+4
dword_520 DCD 0x3FF8A3D7 ; DATA XREF: _main+8
; double x
x DCD 0xAE147AE1 ; DATA XREF: _main+C
dword_528 DCD 0x40400147 ; DATA XREF: _main+10
a32_011_54Lf DCB "32.01 ^ 1.54 = %lf",0xA,0
; DATA XREF: _main+24
D-registers are not used here, just R-register pairs.
17.6.4 ARM64 + Optimizing GCC (Linaro) 4.9.
Listing 17.8: Optimizing GCC (Linaro) 4.9
f:
stp x29, x30, [sp, -16]!
add x29, sp, 0
ldr d1, .LC1 ; load 1.54 into D1
ldr d0, .LC0 ; load 32.01 into D0
bl pow
; result of pow() in D0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
ldp x29, x30, [sp], 16
ret
.LC0:
; 32.01 in IEEE 754 format
.word -1374389535
.word 1077936455
.LC1:
; 1.54 in IEEE 754 format
.word 171798692
.word 1073259479
.LC2:
.string "32.01 ^ 1.54 = %lf\n"