CHAPTER 17. FLOATING-POINT UNIT CHAPTER 17. FLOATING-POINT UNIT
17.7.4 MIPS.
The co-processor of the MIPS processor has a condition bit which can be set in the FPU and checked in the CPU. Earlier
MIPS-es have only one condition bit (called FCC0), later ones have 8 (called FCC7-FCC0). This bit (or bits) are located in
the register called FCCR.
Listing 17.23: Optimizing GCC 4.4.5 (IDA)d_max:
; set FPU condition bit if $f14<$f12 (b<a):
c.lt.d $f14, $f12
or $at, $zero ; NOP
; jump to locret_14 if condition bit is set
bc1t locret_14
; this instruction is always executed (set return value to "a"):
mov.d $f0, $f12 ; branch delay slot
; this instruction is executed only if branch was not taken (i.e., if b>=a)
; set return value to "b":
mov.d $f0, $f14
locret_14:
jr $ra
or $at, $zero ; branch delay slot, NOP
C.LT.Dcompares two values.LTis the condition “Less Than”.Dimplies values of typedouble. Depending on the result of
the comparison, the FCC0 condition bit is either set or cleared.
BC1Tchecks the FCC0 bit and jumps if the bit is set.Tmean that the jump is to be taken if the bit is set (“True”). There is
also the instruction “BC1F” which jumps if the bit is cleared (“False”).
Depending on the jump, one of function arguments is placed into $F0.
17.8 Stack, calculators and reverse Polish notation
Now we undestand why some old calculators used reverse Polish notation^22. For example, for addition of 12 and 34 one
has to enter 12, then 34, then press “plus” sign. It’s because old calculators were just stack machine implementations, and
this was much simpler than to handle complex parenthesized expressions.
17.9 x64
On how floating point numbers are processed in x86-64, read more here:27 on page 411.
17.10Exercises.
(^22) wikipedia.org/wiki/Reverse_Polish_notation