Audio Engineering

(Barry) #1

216 Chapter 7


Since output load and other inadvertent capacitances are unavoidable, it is essential to
ensure that all such current limited stages operate at a current level that allows potential
slewing to occur at rates that are at least 10 greater than the fastest signal components.
Alternatively, means may be taken, by way of a simple input integrating circuit, ( R 1 C 1 ),
as shown in Figure 7.49 , to ensure that the maximum rate of change of the input signal
voltage is within the ability of the amplifi er to handle it.


7.16.3 Spurious Signals


In addition to harmonic, IM, and transient defects in the signal channel, which will show
up on normal instrumental testing, there is a whole range of spurious signals that may not


V

CC 1

CC 2

Q 1

C

0V

V

Eout

Ein

Figure 7.48 : Circuit design aspects that may cause slew-rate limiting.




R 3

C 1

Ein R 1

R 2

0V

0V

Eout

Figure 7.49 : Input HF limiting circuit to lessen slew-rate limiting.
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