450 Chapter 15
Start
bitBit calls
Data
Hex
ASCII00
63
hi61010110 10010110Data
bitsParity
bitStop
bitStart
bitData
bitsParity Stop(b)
Figure 15.6(b) : Serial transmission requires the sender and receiver to use and recognize the
same signal format or protocol, such as RS232. For each byte, the composite signal contains
a start bit, a parity bit, and a stop bit using inverted logic (1 12 V; 0 12 V). The
time interval between each bit of the signal (the start bit, parity bit, stop bit, and data bits)
is fi xed and must be kept constant.You should refer to a text on the use of transmission lines for a full discussion of this
point but for guidance here is a simple way of determining whether you will benefi t by
considering the transmission path as a transmission line.
● Look up the logic signal rise time, tR.
● Determine the propagation velocity in the chosen cable, v. This will be typically
about 0.6 of the speed of light.
● Determine the length of the signal path, l.
● Calculate the propagation delay, τ l/v.
● Calculate the ratio of tR / τ.
● If the ratio is greater than 8, then the signal path can be considered electrically
short and you will need to consider the signal path’s inductance or capacitance,
whichever is dominant.
● If the ratio is less than 8, then consider the signal path in terms of a transmission line.The speed at which logic transitions take place determines the maximum rate at which
information can be handled by a logic system. The rise and fall times of a logic signal are