Audio Engineering

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606 Chapter 20


Channel Arbitrated Loop (FC-AL), which was designed for new mass storage devices
and other peripheral devices that require very high bandwidth. Using an optical fi ber to
connect devices, FC-AL supports full-duplex data transfer rates of 100 Mbit/s. This is far
too high a transfer rate to be relevant as an audio-only standard. However, in multichannel
applications and in multimedia applications (with video, for example) Fibre Channel may
well fi nd its way into the modern studio, so much so that FC-AL is expected to eventually
replace SCSI for high-performance storage systems.


20.6.4 Firewire (IEEE 1394) Interface


The “ Firewire ” (IEEE 1394 interface) is an international standard, low-cost digital
interface intended to integrate entertainment, communication, and computing electronics
into consumer multimedia. Originated by Apple Computer as a desktop LAN, Firewire
has been developed by the IEEE 1394 working group. Firewire supports 63 devices on
a single bus (SCSI supports 7, SCSI Wide supports 15) and allows buses to be bridged
(joined together) to give a theoretical maximum of thousands of devices. It uses a thin,
easy to handle cable that can stretch further between devices than SCSI, which only
supports a maximum “ chain ” length of 7 meters (20 feet). Firewire supports 64-bit
addressing with automatic address selection and has been designed from the ground up
as a “ plug and play ” interface. Firewire can handle 10 Mbytes per second of continuous
data with improvements in the design promising continuous throughput of 20–40 Mbytes
per second in the very near future and a long-term potential of over 100 Mbytes/s. Much
like LANs and WANs, IEEE 1394 is defi ned by the high-level application interfaces that
use it, not a single physical implementation. Therefore, as new silicon technologies allow
high higher speeds and longer distances, IEEE 1394 will scale to enable new applications.


20.7 Digital Noise Generation—Chain Code Generators


The binary sequence generated by a chain code generator appears to have no logical
pattern; it is, to all intents and purposes, a random sequence of binary numbers. The code
is generated by a shift register that is clocked at a predetermined frequency and whose
input is derived from a network that develops a function of the outputs from the register.


A basic form of chain code generator is illustrated in Figure 20.6 , which consists of a
4-bit shift register whose input is derived from the output of an exclusive-OR gate, itself
fed from the penultimate and last output of the shift register. The output from the chain

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