Fundamentals and Instruments 883from a variable-frequency “ voltage-controlled oscillator ” (VCO) are taken to a “ phase-
sensitive detector ” (PSD)—a device whose output consists of the “ sum ” and “ difference ”
frequencies of the two input signals. If the sum frequency is removed by fi ltration, and if
the two input signals should happen to be at the same frequency, the difference frequency
will be zero, and the PSD output voltage will be a DC potential whose sign is determined
by the relative phase angle between the two input signals.
If this output voltage is amplifi ed (having been fi ltered to remove the unwanted “ sum ”
frequencies) and then fed as a DC control voltage to the VCO (a device whose output
frequency is determined by the voltage applied to it), then, providing that the initial
operating frequencies of the clock and the VCO are within the frequency “ capture ” range
determined by the loop low-pass fi lter, the action of the circuit will be to force the VCO
into frequency synchronism (but phase quadrature) with the clock signal: a condition
usually called “ lock. ” Now if, as in Figure 30.8 , the clock and VCO signals are passed
through frequency divider stages, having values of ÷ M and ÷ N, respectively, when the
loop is in lock the output frequency of the VCO will be Fout Fck (N/M). If the clock
frequency is suffi ciently high, appropriate values of M and N can be found to allow the
generation of virtually any desired VCO frequency. In an audio band oscillator, since
the VCO will probably be a “ varicap ” -controlled LC oscillator, operating in the MHz
range, the output signal will normally be obtained from a further variable ratio frequency
divider, as shown in Figure 30.8. For the convenience of the user, once the required
output frequency is keyed in, the actual division ratios required to generate the chosen
output frequency will be determined by a microprocessor from ROM-based look-up
tables, and the output signal frequency will be displayed as a numerical readout.
Given the availability of a stable, controllable frequency input signal, the generation of
a low-distortion sinewave can, again, be done in many ways. For example, the circuit
arrangement shown in Figure 30.9 is quoted by Horowitz and Hill ( The Art of Electronics ,
2nd ed. 667). In this, a logic voltage level step is clocked through a parallel output
shift register connected to a group of resistors whose outputs are summed by an
amplifi er ( A 1 ). The output is a continuous waveform, of staircase type character, at
a frequency of Fck /16.
If the values of the resistors R 1 –R 7 are chosen correctly, the output will approximate to a
sinewave, the lowest of whose harmonic distortion components is the 15th, at –24 dB. This
distortion can be further reduced by low-pass fi ltering the output waveform. A more precise