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Chips, Ahoy! 195

Experiment 19: Learning Logic

FundAmentAls


Rules for connecting logic gates (continued)


Not permitted:



  • No floating-input pins! On CMOS chips such as the HC
    family, you must always connect all input pins with a
    known voltage, even if they supply a gate on the chip
    that you’re not using. When you use a SPST switch to
    control an input, remember that in its “off” position, it
    leaves the input unconnected. Use a pull-up or pull-
    down resistor to prevent this situation. See Figure 4-77.

  • Don’t use an unregulated power supply, or more than 5
    volts, to power 74HCxx or 74LSxx logic gates.

  • Be careful when using the output from a logic gate to
    power even a low-current LED. Check how many mil-
    liamps are being drawn. Also be careful when “sharing”
    the output from a logic gate with the input of another
    gate, at the same time that it is driving an LED. The LED
    may pull down the output voltage, to a point where
    the other gate won’t recognize it. Always check cur-
    rents and voltages when modifying a circuit or design-
    ing a new one.

  • Never apply a significant voltage or current to the
    output pin of a logic gate. In other words, don’t force
    an input into an output.

  • Never link the outputs from two or more logic gates. If
    they must share a common output wire, use diodes to
    protect them from each other. See Figure 4-78.


Not
good

Good

1

1

Not
good

Good

1

1

Figure 4-77. Because a CMOS chip is so sensitive to input
fluctuations, a logical input should never be left “floating,” or
unattached to a defined voltage source. This means that any
single-throw switch or pushbutton should be used with a pull-
up or pull-down resistor, so that when the contacts are open,
the input is still defined.

Not
Good

Good Good

Figure 4-78. The output from one logic gate must not be allowed to feed back into the output from another logic gate. Diodes can
be used to isolate them, or they can be linked via another gate.

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