VHDL Programming

Data Types 95

Lines 5 and 6 show that not only can record fields be read from, but

they can be assigned to as well. In these two lines, two of the fields of the

record are assigned the values from variable dest.

Line 7 shows an example of an aggregate assignment. In this line, all of

the fields of the record are being assigned at once. The aggregate assigned

contains three entries: an optypevalue, an INTEGERvariable value, and

an INTEGERvalue. This is a legal assignment to variable record inst.

Line 8 shows an example of an illegal aggregate value for record inst.

There is only one value present in the aggregate, which is an illegal type

for the record.

In the examples so far, all of the elements of the records have been

scalars. Let’s examine some examples of records that have more complex

field types. A record for a data packet is shown here:

TYPE word IS ARRAY(0 TO 3) OF std_logic;

TYPE t_word_array IS ARRAY(0 TO 15) OF word;

TYPE addr_type IS

RECORD

source : INTEGER;

key : INTEGER;

END RECORD;

TYPE data_packet IS

RECORD

addr : addr_type;

data : t_word_array;

checksum : INTEGER;

parity : BOOLEAN;

END RECORD;

The first two type declarations define type wordand addr_type, which

are used in the record data_packet. Type wordis a simple array and

type addr_typeis a simple record. Record type data_packetcontains

four fields using these two types in combination with two VHDL prede-

fined types.

The following example shows how a variable of type data_packet

would be accessed:

PROCESS(X)

VARIABLE packet : data_packet;

BEGIN

packet.addr.key := 5; --Ok line 1

packet.addr := (10, 20); --Ok line 2

packet.data(0) := (‘ 0 ’, ‘ 0 ’, ‘ 0 ’, ‘ 0 ’); --Ok line 3