VHDL Programming

Configurations 187

a new function,calc_delay, which is used to retrieve the proper delay

value from the delay table, depending on the type of transition occurring.

The and3and invgates of the decoder example have been rewritten to

include the generics discussed previously, as well as the delay calculation

function. Following are the new models:

LIBRARY IEEE;

USE IEEE.std_logic_1164.ALL;

USE WORK.p_time_pack.ALL;

ENTITY inv IS

GENERIC( mode : t_time_mode;

delay_tab : t_time_rec :=

(( 1 ns, 2 ns), -- min

(( ( 2 ns, 3 ns), -- typ

(( ( 3 ns, 4 ns))); -- max

PORT( a : IN std_logic;

PORT( b : OUT std_logic);

END inv;

ARCHITECTURE inv_gen OF inv IS

BEGIN

inv_proc : PROCESS(a)

VARIABLE state : std_logic;

BEGIN

state := NOT(a);

b <= state after calc_delay( state, mode, delay_tab);

END PROCESS inv_proc;

END inv_gen;

LIBRARY IEEE; USE IEEE.std_logic_1164.ALL;

USE WORK.p_time_pack.ALL;

ENTITY and3 IS

GENERIC( mode : t_time_mode;

delay_tab : t_time_rec :=

(( 2 ns, 3 ns), -- min

(( ( 3 ns, 4 ns), -- typ

(( ( 4 ns, 5 ns))); -- max

PORT( a1, a2, a3 : IN std_logic;

PORT( o1 : OUT std_logic);

END and3;

ARCHITECTURE and3_gen OF and3 IS

BEGIN

and3_proc : PROCESS( a1, a2, a3 )

VARIABLE state : std_logic;

BEGIN

state := a1 AND a2 AND a3;

o1 <= state after calc_delay( state, mode, delay_tab);

END PROCESS and3_proc;

END and3_gen;