VHDL Programming

214 Chapter Eight

‘ 1 ’, — RX

‘ 0 ’, — F0

‘ 1 ’, — F1

‘ 1 ’); — FX

BEGIN

RETURN nine_2_bit(t);

END nine_val_2_bit;

FUNCTION “AND”(l,r : t_nine_val) RETURN BIT IS

BEGIN

RETURN (nine_val_2_bit(l) AND nine_val_2_bit(r));

END;

FUNCTION “AND”(l :BIT; r : t_nine_val) RETURN BIT IS

BEGIN

RETURN ( l AND nine_val_2_bit(r));

END;

FUNCTION “AND”(l : t_nine_val; r : BIT) RETURN BIT IS

BEGIN

RETURN (nine_val_2_bit(l) AND r);

END;

END p_logic_pack;

The package p_logic_packdeclares three overloaded functions for the

ANDoperator. In one function, both input types are type t_nine_val.In

the other two functions, only one input is type t_nine_val, and the other

input is type BIT. All functions return a result of type BIT. Notice that, to

overload the ANDoperator, the syntax is the same as overloading the +

operator from the previous example.

When the ANDoperator is used in a model, the appropriate function is

called based on the types of the operands. In the following code fragments,

we can see the differences:

SIGNAL a, b : t_nine_val;

SIGNAL c,e : bit;

e <= a AND b;

-- calls first function

e <= a AND c;

-- calls third function

e <= c AND b;

-- calls second function

By having three functions called AND, we do not need to worry about

which side of the operator an expression resides on. All of the possible