342 Chapter Fourteen
changed by another forcecommand. The input signals are all set to an
initial value and the runcommand advances simulation time and runs
the simulation. All of the input values are propagated appropriately
through the design.
After the runcommand has finished, the new input stimulus values are
set up with more forcecommands, and the simulation is run again. This
process continues until all stimulus has been run through the design. The
writecommand near the end of the file writes the results of the simulation
to a file. The designer can analyze the output file to determine if the design
is correct or use a file compare facility to automatically compare the DUT
results to known good results.
The advantages of a simulator-specific testbench are that it is fairly
quick and easy to generate, and it can be loaded and reloaded into the
simulator without shutting the simulator down and starting over every
time. A simulation can be run, the results analyzed, simulation time reset
to 0, a stimulus file loaded, and the simulator run again.
The disadvantage of the simulator-specific testbench is that the test-
bench is specific to one simulator and cannot be easily migrated. If the
design is to be passed to another design group using another simulator,
the testbenches need to be rewritten in the new command language.
Hybrid Testbenches
Hybrid testbenches do not utilize only one technique, but a combination
of a number of techniques. Hybrid testbenches can use a full testbench
approach but have some of the stimulus data generated in the test-
bench ratherthan read from a file. Hybrid testbenches can also mix
simulator-specific commands with stimulus read from a file.
Following is a sample hybrid testbench:
ENTITY testbench IS END;
------------------------------------------------------------
-- HYBRID Testbench
-- testbench for 8-bit loadable updown counter
-- reads from file “counter.txt”
------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE std.textio.ALL;
USE ieee.std_logic_textio.all;