Microsoft Word - Digital Logic Design v_4_6a

5) Use the PS/NS table or the composite K-map to obtain a state diagram, ASM chart or timing

diagram to show the behavior of the circuit.

Solutions:

Since there are two flip-flop, the state machine has 4 states.

00

01

10

11

Classic State machine

• Links show input, output in 1s and 0s


• State is inside the circles

In the case of Moore machines, outputs must be inside the circle because they only depends on
the current state.

Note: A simplified State machine shows the links between states in Boolean expressions.

1,0

1,0

1,1

0,0

0,0

1,0

0,0

Notes

1) State 00 is reset

2) Output Z=1 only when the input

sequence is 101, so this could be

“101” pattern detector.

3) State “10” is referred to as

“illegal state”, “unused state” or an

“unreachable state”.

4) One way to ensure you don’t end

up in illegal state is to have a power

on reset.

Y 1 Y 2

X,Z

Legend

0,0

Y1 Y2 X Y1+ Y2 + Z

0 0 0 0 0 0

0 0 1 0 1 0

0 1 0 1 1 0

0 1 1 0 1 0

1 0 0 0 0 0

1 0 1 0 1 0

1 1 0 0 0 0

1 1 1 0 1 1

PS/NS Table Composite K-map where:

 Ys and Xs are independent variables

 Ys+ and Zs are Dependent

OR

00,0 01,0

11,0 01,0

00,0 01,1

00,0 01,0

Y 1 +^ Y 2 +, Z

X

Y 1 Y 2

00

01

11

10

0 1