Microsoft Word - Digital Logic Design v_4_6a

 “Bed-of-Nails” and “In-Circuit” Testing

In a digital circuit that is on a PC board (PCB), most manufacturers use a cushion of probes

(nails) that makes contact with every signal in the PCB. Then it can be used to drive through the

control points and observe the results at observation points.

Although these devices are expensive, they allow the manufacturer to test a circuit in seconds

and have the confidence that all critical circuits operate to the specification.

Agilent and Tektronix are two of the largest in-circuit test solution vendors.

 Scan Method

An in-circuit test cannot test custom ICs and FPGAs, since internal signals are not accessible.

Even with many PCBs, the high-density and surface mounting have limited their effectiveness.

A scan method attempts to control and observe the internal signals of a circuit using only a small

number of test points.

A scan-path method considers any digital circuit to be a collection of flip-flops or other storage

elements interconnected by combinational logic.

The basic idea of a scan test is to control and observe the state of storage elements. It does this

by providing a normal operation mode and a separate scan operation mode where the storage

elements are reorganized into a giant shift register (Linear Feedback Shift Register) to test the

storage elements

Here is a sample:

Note: Heavier dashed lines indicate the Scan Path

Note: For a more robust scan test, input pattern are designed using Primitive polynomials. Each
polynomial offers a different level of coverage and error detection. This area represents an opportunity for

Comb.

. (^) Logic
Primary
Input

D Q

T

TE

CLK

D Q

T

TE

CLK

Comb.

Logic

Clock

EN_SCAN

SCAN IN

D Q

T

TE

CLK

D Q

T

TE

CLK

Comb.

Logic

Primary

Output

.

SCAN OUT