Microsoft Word - Digital Logic Design v_4_6a

Example of implementing a 256-to-1 MUX using 8-to-1 MUXes.

Diagram of 256 to 1 MUX.

Diagram of a 256-to-1 MUX using 8-to-1 MUXes:

F

D 0

D 255

.

.

.

S 0

S 7

D0

D1 S

0

1

D2

D3 S

0

1

S 0

S 0

S

0

1

S 1

Cascade Level 2 Cascade Level 1

F