Microsoft Word - Digital Logic Design v_4_6a

Step 3. Take a look at any Function Static hazards that exist, and if they may cause a Glitch.

Hint: Look for two or more input changing simultaneously.

**Note: A system hazard does not have any impact on the functionality if:

• The inputs are not changed to trigger the hazard condition.

or

• The output will not be used until the input is stabilized.

00

01

11

10

A 0 1

C

M4(100)  m3 (011)

Function static Hazard

A

B

C

C1

F

During NAND Propagation delay C=C1=0 therefore F=0 during the delay which is a Logic 0 Glitch.

F= 1 1

so is a static 1 hazard logic 0 glitch

16

00 01

02 13

17

14 05

Side Bar

If F=0  0 but has a high glitch, then it is

called static 0 hazard. For example, m 0

to m 5.

F Logic 1 glitch

F= 0  0 so static 0

hazard

00

01

11

10

A C^ 0 1^

16

00 01

02 13

17

14 05

m 7 (111)  m 6 (110)

Logic static Hazard

A

B

C

C1

F

During NAND propagation delay C=C1=0; therefore

F=0 during the delay. This is a Logic 0 Glitch.

To remove this logic static

hazard, add a term that covers

both m6 & m7

00

01

11

10

AB 0 1^

1

0 0

0 1

1

1 0

F(A,B,C)= A.C+B.C+A.B

This is a logic hazard-free

function

The process is called the Chain

Link Rule.

C