Hardware Manual PCD 1 / PCD 2 Series│Document 26 / 737│Edition EN 15│2008-07-
Saia-Burgess Controls AG
System resourcesCPUs and expansion housings3
3.3.3 Media
Type Number Addresses Remarks
Flags (1 bit) 8192 F 0... 8191 By default, flags are not volatile,
but a volatile range can be
configured, beginning with
address 0
Register (32 bit)
PCD
PCD2.M110/120/M150/M
PCD2.M4096
4096
16384
R 0... 4095
R 0... 4095
R 0... 16383
For integer or
floating point valuesEEPROM register (32 bit)
PCD1.M110/120/
PCD1.M1x
PCD5
50
50
Allow values to be stored that are
retained even when the battery or
the buffer capacitor are empty.
SYSRD/SYSWR instructions
can be used to read and write
these values. The mechanism
is intended for configuration
data that does not change often;ata that does not change often;
the number of write cycles is
restricted.
Text/data blocks
with/out extended user
memory
PCD
PCD2.M110/M120/M
PCD2.M
PCD2.M4000/
4000/
8000
8191
X or DB0 ...3999/
0 ...3999/
0 ... 7999
0 ... 8190
The texts 0..3999 are always
written to the same memory area
as the user program.
Where the user memory has
been extended, the base memory
can be configured to hold RAM
texts and DBs. The texts and DBs
held in this way have addresses
≥ 4000
Timers/counters (31 bit) 1600 1) T/C 0... 1599 The breakdown of timers and
counters is configurable. Timers
are periodically decremented by
the operating system; the basic
time unit can be set between
10 ms and 10 s
Constants with media code K any
numberValues 0..16383; may be used in
instructions instead of registers
Constants with no media
codeany
numberValues - 2,147,483,648 to
+2,147,483,647. Can only be
loaded into a register with an LD
command, and cannot be used in
instructions instead of registers
Semaphores 100 0 ... 99 Not relevant to PCD1/PCD2;
used for locking resource
accesses in multi-CPU systems
like the PCD
1) The number of timers configured should be only as many as required, to prevent unnecessary CPU loading