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6.2 DIGITAL SYSTEM COMPONENTS 305

Figure E6.2.4Continued

(c)

111 000

110

101

100 011

010

001

Solution

The state table and the state diagram are given in Figures E6.2.4(b) and (c). The horizontal arrows

indicate the times when clock inputs are applied to FF2 and FF3. These times are located by

noting that every timeQ 1 makes a transition from 1 to 0, FF2 is clocked, and whenQ 2 goes from

1 to 0, FF3 is clocked.

In the state diagram, the eight states of the system are indicated by the values of the three-digit

binary numberQ 3 Q 2 Q 1.

EXAMPLE 6.2.5

Given the block diagram of a synchronous counter shown in Figure E6.2.5(a), draw the timing
diagram for the first input pulses, withQ 1 ,Q 2 , andQ 3 initially at 0.

Solution

The timing diagram is shown in Figure E6.2.5(b). Corresponding to the rising transitions of the
input, FF1 operates such thatQ 1 can be drawn as a function of time, as shown in Figure E6.2.5(b).
Because of the AND gate, FF2 can receive change instructions only whenQ 1 =1. Note that FF2