0195136047.pdf

6.2 DIGITAL SYSTEM COMPONENTS 309

B 2 B 2 B 1 B 1 B 0 B 0

+

−

Vref

Vo

R R R R R R R R

1 2 3 4 5 6 7

Figure 6.2.113-bit 2n–RD/A converter.

+

− =

V 1

V 2 Vo

high

Discrete voltage

output

Analog voltage

input signals

low

(logic 1)

(logic 0)

if V 1 ≥ V 2

if V 1 < V 2

Figure 6.2.12Block diagram of analog

comparator.

as the counter gets incremented; whenV 2 is slightly greater than the analog input signal, the
comparator signal becomes low, thereby causing the AND gate to stop the counter. The counter
output at this point becomes the digital representation of the analog input signal. The relatively
long conversion time needed to encode the analog input signal is the major disadvantage of this
method.

SUCCESSIVE-APPROXIMATIONA/D CONVERTER

This converter, shown in Figure 6.2.14, also contains a D/A converter, but the binary counter
is replaced by a successive-approximation register (SAR), which makes the analog-to-digital
conversion much faster. The SAR sets the MSB to 1 and all other bits to 0, after a start-of-
conversion pulse. If the comparator indicates the D/A converter output to be larger than the signal