0195136047.pdf

(Joyce) #1

424 DIGITAL CIRCUITS


VCC = 5 V

VT = 0.7

1

5

4

3

2

1

0.2 to 0.3 V

2345

IB sat = 50

60 μA

50 μA

40 μA

30 μA

20 μA

10 μA

0.5

Saturation

Cutoff

1

Vi

Vi

VO = vCE

RC

RB

RB

vBE

vBE, V

iC
iB

iB, μA

vCE, V

iC, mA

(a)

(b)

Slope = −

− −

+

+

+

vCE


+

+

1

1

2

2

VCE cutoff VCC

VCC

VCC
RC

VCE sat = Vsat

IC cutoff = ICEO iB =^0

IC sat

Figure 9.1.2BJT inverter switch.(a)Circuit withnpnswitching transistor.
(b)Typical operation using load lines.

Thus, the transistor behaves like an ideal switch, as shown in Figure 9.1.3. It can be shown that
saturation will occur when
Vi−VT
RB

>

VCC−Vsat
βRC

or Vi>(VCC−Vsat)

RB
βRC

+VT (9.1.6)

The power dissipated in the transistorp=vCEiC+vBEiB∼=vCEiCis very small or approximately
zero in either cutoff or saturation. It should be noted, however, that power is expended in switching
from one state to the other, going through the linear or active region.
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