0195136047.pdf

426 DIGITAL CIRCUITS

• Propagation delay tdis a certain amount of delay for a change to occur. It is defined here
  as the time to change from 0 to 10% of the final value. (Sometimes propagation delay is
  defined as the time between the 50% level ofViand the 50% level ofVo.) WhenViabruptly
  changes from 0 to 5 V, note that the output voltage and collector current do not initially
  change during the propagation delay time.


• Rise time tris the time needed to change from 10 to 90% of the final level.


• Propagation delay tsoccurs when the input pulse returns to 0 V (i.e., logic level 0). This is
  a result of the time required to remove charge stored in the base region before the transistor
  begins to switch out of saturation and is usually longer thantd.


• Fall time tfis the time required for the output voltage and the collector current to change
  state. That is the time required to switch through the active region from saturation to cutoff.

These times are influenced by the various capacitances inherent in the transistor and other

stray capacitances. In turn, the design of a digital switch is influenced by these propagation

delays, and the rise and fall times, which are grouped under the general category ofswitching

speed.

5 V Cutoff

Saturation

5 V

Vo

ts

tr

td

tf

iC

Vi

t

t

t

Vsat

IC sat

IC cutoff = ICEO

0.9IC sat

0.1IC sat

0

Figure 9.1.5Typical input-voltage waveform and resulting output-voltage waveform.